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Development of 4H silicon carbide JFET-based power integrated circuits
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Zhang, Yongxi. Development of 4H silicon carbide JFET-based power integrated circuits. Retrieved from https://doi.org/doi:10.7282/T3930TFP

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TitleDevelopment of 4H silicon carbide JFET-based power integrated circuits
NameZhang, Yongxi (author); Zhao, Jian (chair); Sheng, Kuang (co-chair); Jiang, Wei (internal member); Weiner, Maurice (outside member); Rutgers University; Graduate School - New Brunswick
Date Created
Other Date2008-10 (degree)
SubjectElectrical and Computer Engineering, Integrated circuits--Design and construction, Silicon carbide
Extentviii, 140 p. : ill.
Description4H-Silicon Carbide (4H-SiC) is a promising semiconductor for the next generation of high power, high frequency, and high temperature applications. Significant progresses have been made on SiC technologies since 1990’s. Superior device performance demonstrated by SiC discrete power devices is leading to the commercialization of SiC diodes and transistors targeting mid and high power level applications. As compared to the vertical power devices, the lateral device technology promises to fulfill the monolithic integration of both power devices and control circuits. SiC power integrated circuits (PICs) share similar advantages as Si PICs while providing a much higher power handling capability at higher frequency. In addition, SiC power junction field transistor (JFET) is promising for high temperature, reliable operation without suffering from the reliability problems faced by metal-oxide-semiconductor junction field transistors (MOSFETs) and bipolar junction transistors (BJTs). Therefore, the lateral JFET technology is investigated under this research. This thesis describes design, fabrication, characterization, and further optimization and analysis of a novel vertical channel lateral JFET (VC-LJFET) technology in 4H-SiC and the demonstration of the world’s first SiC power Integrated circuit. A double reduced surface electric field (RESURF) structure is applied to achieve higher voltage and lower on-resistance for the power lateral JFET (LJFET). A 4-stage buffer circuit based on the resistive-load n-type JFET inverter is designed and integrated with the power LJFET to form a monolithic power integrated circuit. Important fabrication procedures are presented. The fabricated power LJFET demonstrates a blocking voltage of 1028 V and a specific on-resistance of 9.1 mΩ·cm2, resulting in a record-high VBR2/RON,SP figure-of-merit (FOM) of 116 MW/cm2 for lateral power devices. The optimized RESURF structure demonstrates blocking capability of 120 V/µm in 4H-SiC. The temperature dependences of important device parameters, such as threshold voltage, transconductance, and electron mobility, are also discussed. Based on the technology, the integration of a high performance lateral power JFET with buffer circuits has been demonstrated for the first time. The SiC LJFET power IC chips demonstrate a record high power level at frequencies up to a few MHz. An on-chip temperature sensing diode is implemented to monitor the chip junction temperature. The rise time and fall time around 20 ns for the SiC power LJFET are observed and remains unchanged even at a junction temperature as high as 250 oC when driven by a Si MOS gate driver. The demonstration of SiC power integration technology points to the robust integrated power electronics applications in the harsh environment and boosts the power level of single-chip power electronic system from 100 W to 1000 W.
NotePh.D.
NoteIncludes bibliographical references (p. 131-137)
Noteby Yongxi Zhang
Genretheses, ETD doctoral
Persistent URLhttps://doi.org/doi:10.7282/T3930TFP
Languageeng
CollectionGraduate School - New Brunswick Electronic Theses and Dissertations
Organization NameNjNbRU
RightsThe author owns the copyright to this work.
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